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Verilog module runs at 24 MHz and uses four clocks for an LCD command cycle, so roughly 6 MHz update rate. PWM doesn't look very good. Too much flicker, even at multiple MHz updates. The FPGA makes wiring easy -- connect eleven pins straight across to the display and map them in the PCF file.

OLED module has a "Graphics mode" that allows direct writes into the data RAM. 80x16 (addressed in 8-bit columns). With the USB serial port enabled, it is possible to stream very low-bit "video" to the display. Note that the graphics enable must be the last setup command sent to the display.

2019 FPGA Hacks

Last update: November 8, 2020