At the 2018 Open Compute Project annual summit, Bill Carter announced they were supporting the Open System Firmware sub-project. One of the goals is to bring LinuxBoot support to the OCP hardware designs, which are "open" in that the schematics are available, but the firmware was still proprietary.
This matches well with the goals of the Heads and NERF projects, so after the conference we had two day hackathon with LinuxBoot, Heads, Facebook, Google and Horizon hackers to do system bring-up and QA on a range of OCP servers.
|!! Winterfell !! Leopard !! Tioga Pass||Monolake !! Wedge !! Meaning|
|CPU||E5-2600v1 & v2|
|Flash size||16 MB|
|DXE Size||4.2 MB|
Two Socket systems
The Winterfell nodes are dual socket E5-2600v2 CPU, introduced in 2015. LinuxBoot works well on the hardware (initial port by Horizon Computing).
OpenBMC: NO, VGA: NO, TPM: NO, OOB: NO, ACPI: YES, LOM: YES, PCIe: YES, DxeCore: NO
Leopard is the follow-on to Winterfell with dual socket E5-2600v3 CPUs. During the first day of the hackathon we were able to get the system booting with LinuxBoot, although there was a slowness in the kexec'ed OS that we traced to a AST VGA issue. Works well otherwise.
OpenBMC: No, VGA: Yes, TPM: Yes (not working), ACPI: Yes, LOM: None, PCIe: Yes, DxeCore: Yes
Tioga Pass is the 2018 update to the dual socket Leopard design. It is the first dual socket to use OpenBMC and also the first that has BootGuard enabled CPUs; luckily we're able to bypass the protection to install our own DxeCore and LinuxBoot firmware image.
One thing to note is that this machine takes forever to get through the PEI phase if all DIMM sockets are populated and the fans are quite a bit louder than Winterfell.
Monolake/Yosemite is a fairly large change in design from the Winterfell/Leopard/TiogaPass designs. It has one OpenBMC carrier board that has four "PCIe" slots on it, each of which holds a single socket Broadwell or Skylake CPU. The four boards share a single NIC via SR-IOV.
Intel publishes the FSP for the SoC CPUs in Monolake, so it is possible to run coreboot+FSP in place of the proprietary vendor firmware.
The Wedge 100 is a 32 port 100G switch built around a Broadwell microserver. Intel publishes the FSP for this chip, so it is possible to replace the entire vendor firmware with coreboot+FSP and jump into LinuxBoot. It also supports OpenBMC.
Rebooting a switch takes down many nodes, so reboot time is a critical feature on this platform.
One thing to be aware of is that there are multiple vendors of the OPC hardware and the boards are not identical. For the LinuxBoot tree we are able to build separate ROM images for the different boards since they might have different GPIO or straps configured.